Samsung was at the IEEE International Solid-State Circuits Conference (ISSCC) to showcase its new 256 Gb memory chips based on SRAM technology. The technology behind it is the most interesting of this jump, using a 3 nm process node.
Samsung reveals 256Gb MBCFET chip and 3nm node
Samsung is already beginning to experiment and design chips in 3 nm. Its 256 Gb memory chip is the first to use its new MBCFET (multi-bridge channel FET) transistor technology. This jump will allow chips with a higher density of transistors and more efficient at the level of electrical consumption.
Samsung is currently developing GAAFET (gate-all-around) or MBCFET (multi-bridge channel FET) technology.
The SRAM shared by Samsung uses MBCFET technology and is a 256 Gb capacity chip with a surface area of 56 mm². One of the aspects that the people of Samsung stand out the most is that the chip requires 230 mV less power for data writes, compared to GAAFET technology.
The plan would be to use the 3nm MBCFET process to enter full-scale production sometime in 2022. It is normal that we still do not have demonstrations on these new Samsung chips, but it seems that the Asian manufacturer is already well ahead with its first 3nm chips, with a view to starting mass production next year. The plan seems similar to the one SK Hynix and Micron have. We will keep you informed.
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