Literally, in the last days of 2020, AMD filed an application with the US Patent Office, in which it described the idea of creating a GPU with a chipset structure. To do this, the company's engineers will have to solve a number of problems characteristic of such a design.
Standard GPU programming techniques are ineffective for working with multiple GPUs (which, in principle, reflects the almost complete rejection of Crossfire / SLI graphics bundles), since it is difficult to distribute parallelism between several active crystals in the system. This document describes one possible way to synchronize memory contents across multiple GPU chipsets.
AMD believes these problems could have been avoided by implementing "passive, high-bandwidth cross-links." The first GPU chipset will be directly "communicatively coupled" to the CPU, while each of the chiplets in the array will communicate with the first GPU via passive cross-linking.
In this sense, AMD views passive cross-communication as a kind of wires between chiplets, placed on a substrate with one or more silicon interposer layers. Such a group of GPUs will act as a system on a chip, which is divided into different functional chips.
AMD has not publicly confirmed that it is working on a GPU chiplet design. However, there were rumors that the RDNA3 architecture could be implemented precisely in multi-chip GPUs. As we know, the company has extensive experience with such designs, especially in the current Ryzen and EPYC processors.
In addition, Intel and Nvidia are working on similar technologies. The former has already confirmed its Xe-HP multi-chip accelerators, which are expected to debut this year. If rumors are to be believed, Nvidia will introduce an MCM graphics chip with Hopper architecture in the future.
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